YakmoijebrilleShaared links2018-07-26T14:02:37+02:00Yakmoijebrillehttp://fabienm.eu/shaarli/http://fabienm.eu/shaarli/Shaarli'WBCLKI' must be connected to an active clock source")http://fabienm.eu/shaarli/shaare/kSQThA2018-07-26T14:02:37+02:002018-07-26T14:02:37+02:00
Sadly IPEXPRESS generates a malfunctional EFB module (at least if verilog is selected) if only I2C configuration (without WISHBONE) is selected. As long as the Lattice support keeps ignoring reports about that a workaround is required. On the bright side this is not that tough. After module generation one simple opens the corresponding .v file and add an input wire e.g. wb_clk_in. Then replace ".WBCLKI(scuba_vlo)" by ".WBCLKI(wb_clk_in)" and make sure that a clock with appropriate frequency is connected to wb_clk_in (WISHBONE clock frequency can be modified in IPEXPRESS during EFB instantiation).