YakmoijebrilleShaared links2021-01-28T20:25:00+01:00Yakmoijebrillehttp://fabienm.eu/shaarli/http://fabienm.eu/shaarli/Shaarli(2) Lessons learned while formally verifying the ZipCPU - Dan Gisselquist - ORConf 2018 - YouTubehttp://fabienm.eu/shaarli/shaare/MCHnXg2021-01-28T20:25:00+01:002021-01-28T20:25:00+01:00— Permalink]]>Tempête dans le monde du FPGA libre. | Front de Libération des FPGAhttp://fabienm.eu/shaarli/shaare/vFfUaw2020-12-01T21:31:24+01:002020-12-01T21:31:24+01:00
Le confinement ne fait vraiment pas du bien aux relations humaines.
— Permalink]]>Software Defined Radio with FPGA -> GDR : Gateware Defined Radiohttp://fabienm.eu/shaarli/shaare/FHaDBg2020-02-04T15:57:13+01:002020-02-04T15:57:13+01:00
De la radio logiciel avec des FPGA par Dan Guisselquist.
— Permalink]]>Writing good quality formal verification testbenches? : yosyshttp://fabienm.eu/shaarli/shaare/ELUusg2019-05-20T16:58:26+02:002019-05-20T16:58:26+02:00— Permalink]]>Lessons learned while formally verifying the ZipCPU - Dan Gisselquist - ORConf 2018 - YouTubehttp://fabienm.eu/shaarli/shaare/hXZ_hQ2018-11-08T09:03:41+01:002018-11-08T09:03:41+01:00— Permalink]]>RE: Building a simulation for my design? What does that mean?http://fabienm.eu/shaarli/shaare/j1AnGg2018-08-23T08:49:39+02:002018-08-23T08:49:39+02:00— Permalink]]>Taking a New Look at Verilatorhttp://fabienm.eu/shaarli/shaare/aCnjCA2018-04-05T21:21:51+02:002018-04-05T21:21:51+02:00
Un article sur verilator par zipCPU et sa «christian company» !